Methods and systems for processing a microelectronic topography

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Reexamination Certificate

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Reexamination Certificate

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08003159

ABSTRACT:
Methods and systems are provided which are adapted to process a microelectronic topography, particularly in association with an electroless deposition process. In general, the methods may include loading the topography into a chamber, closing the chamber to form an enclosed area, and supplying fluids to the enclosed area. In some embodiments, the fluids may fill the enclosed area. In addition or alternatively, a second enclosed area may be formed about the topography. As such, the provided system may be adapted to form different enclosed areas about a substrate holder. In some cases, the method may include agitating a solution to minimize the accumulation of bubbles upon a wafer during an electroless deposition process. As such, the system provided herein may include a means for agitating a solution in some embodiments. Such a means for agitation may be distinct from the inlet/s used to supply the solution to the chamber.

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