Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-11-13
2007-11-13
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S205000, C711S206000, C711S207000, C711S208000, C711S209000, C711S220000
Reexamination Certificate
active
10861710
ABSTRACT:
According to an exemplary embodiment of the present invention, a method for loading data from at least one memory device includes the steps of loading a first value from a first memory location of the at least one memory device, determining a second memory location based on the first value and loading a second value from the second memory location of the at least one memory device, wherein the step of loading a first value is performed by a first processing unit and wherein the steps of determining a second memory location and loading a second value are performed by at least one other processing unit.
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patent: 6226733 (2001-05-01), Belgard
patent: 6792521 (2004-09-01), Arimilli et al.
patent: 7024463 (2006-04-01), Hitomi et al.
patent: 2004/0044872 (2004-03-01), Scott
Collard Jean-Francois
Schlansker Michael S.
Schreiber Robert Samuel
Campos Yaima
Shah Sanjiv
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