Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-03-20
2009-11-17
Rossoshek, Helen (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C326S041000, C326S093000, C326S101000
Reexamination Certificate
active
07620926
ABSTRACT:
Structures and methods of efficiently implementing power management in integrated circuits (ICs). An IC includes columns of logic blocks and columns of power management blocks (PMBs). The columns of PMBs and logic blocks are placed alternately across the IC, with each PMB being coupled to a logic block in an adjacent column, and the logic blocks are coupled to each other across the columns of PMBs. The PMBs can be implemented, for example, using power gates coupled between a global power rail (either ground or power high) and a local power rail specific to the associated logic block. A PMB can be selected from a library of interchangeable PMBs based on power and performance requirements of a target application. Because the PMB is designed as a separate block, any of the interchangeable PMBs in the library can readily be included in the IC.
REFERENCES:
patent: 6363515 (2002-03-01), Rajgopal et al.
patent: 6696856 (2004-02-01), Smith et al.
patent: 6944843 (2005-09-01), Bansal
patent: 6996787 (2006-02-01), Houston
patent: 7098689 (2006-08-01), Tuan et al.
patent: 7266787 (2007-09-01), Hughes et al.
patent: 7370293 (2008-05-01), Yamagata
patent: 7400175 (2008-07-01), Fallah et al.
patent: 7417454 (2008-08-01), Rahman et al.
patent: 7477073 (2009-01-01), Tuan et al.
patent: 7498835 (2009-03-01), Rahman et al.
patent: 7498836 (2009-03-01), Tuan
patent: 7498839 (2009-03-01), Jenkins
patent: 7509613 (2009-03-01), Frenkil
patent: 2005/0034095 (2005-02-01), Bansal
patent: 2005/0192787 (2005-09-01), Kuwahara et al.
patent: 2006/0265681 (2006-11-01), Bakir et al.
patent: 2009/0115452 (2009-05-01), Ichinomiya
Tran et al.; “95% Leakage-Reduced FPGA using Zigzag Power-gating, Dual-VTH/VDD and Micro-VDD-Hopping”; Nov. 2005; Asian Solid-State Circuits Conference; pp. 149-152.
Cartier Lois D.
Rossoshek Helen
Xilinx , Inc.
LandOfFree
Methods and structures for flexible power management in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and structures for flexible power management in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and structures for flexible power management in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4113271