Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-06-30
2004-11-16
Elmore, Reba I. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S154000, C711S162000
Reexamination Certificate
active
06820171
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to storage subsystem architectures and in particular to a RAID storage subsystem architecture that applies SAN principles and technology to the internal architecture of the storage subsystem.
2. Discussion of Related Art
Computer storage subsystems are evolving at a rapid pace to require, at once, high capacity, high performance and high reliability. Disk drive technology has evolved to enable large capacities in individual disk drives. As applied in storage subsystems with multiple drives to achieve higher total storage capacity, each high capacity disk drive gives rise to performance bottlenecks as well as significant reliability problems. Where, for example, an entire request to store or retrieve data is directed to a single disk drive, the throughput of the storage system will be that of the single disk drive and the reliability of the subsystem will be that of a particular disk drive.
Redundant arrays of inexpensive disks (“RAID”) storage systems have addressed these needs by providing redundancy for reliability and management techniques to achieve higher performance. Specifically, RAID subsystems apply various management techniques (often referred to as RAID “levels”) to provide redundancy in the storage of data on the disk drives such that failure of a single disk drive does not render the entire subsystem unusable. Other RAID techniques (“striping”) distribute the data over multiple disk drives to achieve the benefit of multiple disk drives processing a single larger I/O request to read or write data. Where N disk drives are used to process a single I/O request, the time to complete the request as compared to a single drive is on the order of 1/N.
The “array” of multiple disk drives in a RAID storage subsystem is managed by a RAID storage controller device. The storage controller typically includes a general purpose microprocessor with associated program memory, cache memory for caching data sent to and from the disk drive array, “back-end” interfaces to adapt the controller to the disk drive array (i.e., SCSI and/or Fibre Channel interface controllers), a “front-end” interface to couple the controller to one or more host systems, etc. The storage controller manages the disk array to make the array appear to a host computer as a large single disk drive that offers improved performance and reliability as compared that of a single disk drive.
To further enhance reliability and performance, RAID subsystems also are known to utilize multiple such storage controllers. The multiple storage controllers are often configured and managed to provide redundancy such that failure of a single storage controller does not render the subsystem inaccessible. The multiple controllers may also be configured to enhance performance of the storage subsystem by providing parallel processing by multiple controllers of multiple host system I/O requests. The load of I/O requests may therefore be distributed over the plurality of storage controllers to reduce the total processing time required for a series of I/O requests that may be processed in parallel.
Such multiple controller architectures still suffer from certain performance bottlenecks. For example, it is common that the multiple controllers share a common connection to the disk drives in the disk array. Shared use of the common disk interface can therefore become a performance restriction for multiple controllers in processing multiple I/O requests in parallel. Similarly, the number of I/O connections (“channels”) for connecting the multiple controllers to host systems may be a bottleneck.
Addition of disk drives without corresponding addition of communication channels and associated back-end control functionality could easily saturate existing disk channels. However, presently known architectures do not readily lend themselves to addition of disk drive communication channels independent of controllers having integrated front-end and back-end control functions. Present architectures generally require that the maximum anticipated bandwidth requirements of the back-end communication channels be anticipated in the original design and architecture of the storage subsystem. When applied to lower-end applications requiring only a portion of such capacity, the subsystem is “over designed” in that excess bandwidth capacity is unused and therefore wasted and costly.
Some prior architectures called for “N-way” connectivity among the controllers and the disk drives. In other words, any number “N” of controllers shared access to a common set of disk drives via a common, single communication channel. However, such architectures can rapidly saturate the single, shared communication channel when additional disk drives are added to increase storage capacity. Even where multiple communication channels are utilized, the architecture calls for each controller to access each disk drive adding cost and complexity to each of the N controllers.
In general, present high performance RAID storage subsystems suffer from lack of flexibility in configuring the multiple controllers and multiple disk storage devices or modules. It is therefore desirable to improve the flexibility of such configurations to permit easier enhancement of performance and reliability characteristics of a storage subsystem.
SUMMARY OF THE INVENTION
The present invention solves the above and other problems, thereby advancing the state of the useful arts, by providing a storage subsystem architecture that divides the controller function between front-end controllers and back-end controllers and that applies storage area network (“SAN”) techniques and devices within the storage subsystem to interconnect the front-end controllers and back-end controllers. SAN components are known and applied outside the storage subsystem for interconnection of such storage subsystems to host computers and other computing subsystems. In the context of this invention, SAN switches are applied within the storage subsystem to permit more flexible configuration of front-end and back-end control devices within the storage subsystem.
A plurality of back-end storage controllers and a plurality of front-end controllers are configured within a storage subsystem interconnected by a SAN switching network that permits broad flexibility in interconnecting the various controllers. The front-end controllers (“FECs”) are dedicated to “front-end” interfacing to host computer systems and are devoid of circuits and functions to control the disk array devices. The back-end controllers (“BECs”) are dedicated to “back-end” control of the disk arrays and are devoid of circuits and functions to interface directly with the attached host systems. In this architecture, the FECs and BECs are simpler than prior integral controllers that provided both front-end and back-end control functions.
Each FEC and BEC includes a SAN interface to connect to the SAN switches. The SAN switches therefore provide flexible interconnection between virtually any number of front-end controllers and any number of back-end controllers. Such a storage subsystem may thereby be flexibly configured to add additional back-end controllers where required for back-end performance or reliability enhancement and may be configured to add additional front-end controllers when required for front-end performance and reliability.
By providing such configuration flexibility and simpler FEC and BEC devices that segregate their respective functions, the storage subsystem is more scalable than prior known architectures. Additional FECs may be added to alleviate host communication bottlenecks independent of BEC control functions. Conversely, BECs may be added to alleviate disk communication bottlenecks independent of FEC control functions.
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Dekoning Rodney A.
Weber Bret S.
Elmore Reba I.
Lathrop & Gage L.C.
LSI Logic Corporation
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