Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-11-18
2008-03-18
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S207000
Reexamination Certificate
active
07346742
ABSTRACT:
Methods and associated structures for bypassing virtual memory and memory mapping management features provided in a memory controller applied to simpler computing applications. In one aspect hereof, simpler, embedded computing applications may utilize standard memory controllers including cash management and memory component interfacing features but may bypass virtual memory management features within the same memory controller component. Rather, features and aspects hereof intercept memory accesses generated by the memory controller for address translation features and perform simpler address substitution to apply an appropriate translated address to the system bus.
REFERENCES:
patent: 2005/0188176 (2005-08-01), Chiang et al.
Besmer Bradley Dean
Day Brian A.
Richards Jana Lynn
Bragdon Reginald
Duft, Borsen & Fishman LLP
LSI Logic Corporation
Namazi Mehdi
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