Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure
Reexamination Certificate
2008-07-09
2010-06-01
Le, Thao X (Department: 2892)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including isolation structure
C438S199000, C257S372000, C257SE27063
Reexamination Certificate
active
07727848
ABSTRACT:
Semiconductor structures and methods for suppressing latch-up in bulk CMOS devices. The semiconductor structure comprises first and second adjacent doped wells formed in the semiconductor material of a substrate. A trench, which includes a base and first sidewalls between the base and the top surface, is defined in the substrate between the first and second doped wells. The trench is partially filled with a conductor material that is electrically coupled with the first and second doped wells. Highly-doped conductive regions may be provided in the semiconductor material bordering the trench at a location adjacent to the conductive material in the trench.
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U.S. Patent and Trademark Office, N
Furukawa Toshiharu
Horak David Vaclav
Koburger III Charles William
Mandelman Jack Allan
Tonti William Robert
International Business Machines - Corporation
Le Thao X
Trice Kimberly
Wood Herron & Evans LLP
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