Methods and apparatuses for controlling fully-buffered dual...

Details Methods and apparatuses for controlling fully-buffered dual... Methods and apparatuses for controlling fully-buffered dual...

2011-05-10

2011-05-10

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

Reexamination Certificate

active

07940591

ABSTRACT:
Methods and apparatuses are presented for controlling a fully buffered dual inline memory module. In one embodiment, the memory module may include at least two memory chips, a buffer coupled to the at least two memory chips (the buffer serially receiving data to be stored in the at least two memory chips), and a heat sink thermally coupled to the at least two memory chips and thermally coupled to the buffer such that heat generated by the buffer is coupled to a first memory chip within the at least two memory chips. The may be configured such that it operates at a higher temperature than the first memory chip and the refresh rate of the first memory chip may be adjusted when the temperature of the first memory chip is outside of a predetermined range.

REFERENCES:
patent: 7609523 (2009-10-01), Ni et al.
patent: 2007/0211548 (2007-09-01), Jain et al.
Nasr, Rami Marwan, “FBSIM and the Fully Buffered DIMM Memory System Architecture”, Thesis, 128 pages, 2005.

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