Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2003-06-27
2008-12-30
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S236000, C711S213000
Reexamination Certificate
active
07472262
ABSTRACT:
Methods and apparatus are disclosed to prefetch memory objects. An example method includes identifying program states associated with an executing program; associating memory profiles with respective ones of the program states; identifying at least one next probable state based on calculated entropy values; and prefetching memory objects associated with the at least one memory profile corresponding to the at least one next probable state.
REFERENCES:
patent: 5606685 (1997-02-01), Frandeen
patent: 5850632 (1998-12-01), Robertson
patent: 6055650 (2000-04-01), Christie
patent: 6237065 (2001-05-01), Banerjia et al.
patent: 6415359 (2002-07-01), Kimura et al.
patent: 6470297 (2002-10-01), Ford
patent: 6571318 (2003-05-01), Sander et al.
patent: 6622168 (2003-09-01), Datta
patent: 6751707 (2004-06-01), Magoshi
patent: 6752335 (2004-06-01), Levia
patent: 6971092 (2005-11-01), Chilimbi
patent: 7007001 (2006-02-01), Oliver et al.
patent: 7043608 (2006-05-01), Sun
patent: 2001/0042172 (2001-11-01), Duesterwald et al.
patent: 2001/0052064 (2001-12-01), Chaudhry et al.
patent: 2002/0152361 (2002-10-01), Dean et al.
patent: 2003/0105942 (2003-06-01), Damron et al.
patent: 2003/0140203 (2003-07-01), Jourdan et al.
patent: 2004/0103408 (2004-05-01), Chilimbi et al.
patent: 2004/0111708 (2004-06-01), Calder et al.
patent: 2004/0154011 (2004-08-01), Wang et al.
patent: 2004/0158818 (2004-08-01), Smith et al.
patent: 2004/0216013 (2004-10-01), Sun
patent: 2004/0216082 (2004-10-01), Sun
Timothy Sherwood, Phase Tracking and Prediction, ISCA, Jun. 2003.
Doug Joseph et al., “Prefetching using Markov Predictors”, 1997 Proceedings of the International Symposium on Computer Architecture (ISCA '97), Jun. 1997, Denver Colorado.
Ashutosh S. Dhodapkar et al., “Managing Multi-Configuration Hardware via Dynamic Working Set Analysis”, May 2002.
Trishul M. Chilimbi et al., “Dynamic Hot Data Stream Prefetching for General-Purpose Programs”, PLDI-2002, May 2002.
Mingqiu Sun et al., “Entropy-based Characterization of Program Phase Behaviors”, Feb. 2004, Madrid Spain.
S. Dhodapkar et al., “Comparing Program Phase Detection Techniques”, Micro-2003, 2003.
V. Bala et al., “Dynamo: A transparent dynamic optimization system”, PLDI '2000, Jun. 2000.
B. Balasubramonian et al., “Memory Hierarchy Reconfiguration for Energy and Performance in General Purpose Architectures”, Micro-2000, Dec. 2000.
J. E. Smith et al., “Dynamic Microarchitecture Adaptation via Co-designed Virtual Machines”, ISSCC-2002, Feb. 2002.
M. Huang et al., “Positional Adaptation of Processors: Application to Energy Reduction”, ISCA-2003, Jun. 2003.
T. Sherwood et al., “Phase Tracking and Prediction”, ISCA-2003, Jun. 2003.
T. Sherwood et al., “Automatically Characterizing Large Scale Program Behavior”, ASPLOS-2002, Oct. 2002.
C.E. Shannon, “A Mathematical Theory of Communication”, Bell Syst. Tech. J., 27, 379-423, 623-656. Jul. and Oct. 1948.
Standard Performance Evaluation Corperation(SPEC) JBB2000 [online]. SPEC [retrieved on May 11, 2004]: Retrieved from the Internet: <URL: http://www.spec.org/jbb2000/>, 2 pages.
Standard Performance Evaluation Corperation(SPEC) JBB2000 [online]. SPECjAppServer [retrieved on May 14, 2004]: Retrieved from the Internet: <URL: http://www.spec.org/jAppServer2002/>, 2 pages.
Dinero IV Trace-Driven Uniprocessor Cache Simulator: [retrieved on May 14, 2004]: Retrieved from the Internet: <URL: http://www.cs.wisc.edu/˜markhill/DinerolV/>, 2 pages.
Hazelwood et al.,Code Cache Management Schemes for Dynamic Optimizers, Proceedings of the Sixth Annual Workshop on Interaction between Compilers and Computer Architectures (Interact'02), 2002, 9 pages.
“Phase Tracking and Prediction”, Sherwood et al., ACM SIGARCH Computer Architecture News, vol. 31, Issue 2, (May 2003), pp. 336-339, ISSN:0163-5964, http://portal.acm.org.
“Reports Listed by Author”, pp. 1-12, www.cs.ucsd.edu/Dienst/UI/2.0/ListAuthors/A-Z/authority=ncstrl.ucsd. Retrieved Dec. 29, 2006.
“Reports Listed by Year”, pp. 1-4, www.cse.ucsd.edu/Dienst/UI/2.0/ListYears/1999-2005?/ Retrieved Jan. 9, 2007.
Phase Tracking and Prediction technical report link, CS2002-1710, dated Jun. 23, 2002, www.cse.ucsd.edu/Dienst/UI/2.0/Describe
cstr1.ucsd—cse/CS2002-0710, pp. 1-2.
Sherwood et al., Abstract for Phase Tracking and Predictions, http://web.archive.org/web/20021119050935/http://www-cse.ucsd.edu/Dienst/UI/2.0/Describe
cstrl.ucsd—cse/CS2002-0710, Nov. 19, 2002.
Hanley, Flight & Zimmerman
Intel Corporation
Peikari B. James
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