Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-05-09
2006-05-09
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C702S064000, C702S066000, C702S120000, C324S522000, C714S043000, C714S032000
Reexamination Certificate
active
07043704
ABSTRACT:
The present invention provides a method for verifying a design of a circuit board that has a wiring layer connecting components to be mounted, a power layer, and an insulating layer formed between the wiring layer and the power layer. According to this method, detection of chippings in the power layer is performed. The chipping is, for example, a gap, a slot, or a slit, and corresponds to one wiring layer and interrupts a region in which the wiring layer and the power layer are opposed to each other. When chippings are detected, a common-mode voltage expected to be caused owing to each of the chippings is computed. Subsequently, the position of the chipping and the value of the common-mode voltage caused owing to the chipping are outputted. Thus, the priorities of the chippings, to which countermeasure for suppressing radiation of electromagnetic waves should be applied, can easily be decided.
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Araki Kenji
Yokoyama Ayao
Depke Robert J.
Kik Phallaka
Smith Matthew
Sony Corporation
Trexler, Bushnell, Giangiorgi, Blackstone & Marr
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