Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1998-07-31
2001-03-20
Lee, Thomas C. (Department: 2782)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C713S100000, C711S170000, C711S200000
Reexamination Certificate
active
06205548
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of computer systems. In particular, this invention is drawn to method and apparatus for updating a nonvolatile memory.
BACKGROUND OF THE INVENTION
Initialization of a computer system (“booting”) is performed upon power-up of the computer system or hardware or software reset operations. In one boot scheme the processor is designed to read a pre-determined memory location when the processor is reset or powered up. The pre-determined memory location stores a pointer or an address which directs the processor to a memory address of the beginning of the bootstrap routines. The pointer or address is referred to as a boot vector.
The boot vector defaults to an address in a nonvolatile memory such as read-only memory (ROM). For software resets, however, the boot vector may point to a random access memory (RAM) location. The nonvolatile memory stores the bootstrap loader and typically stores other initialization routines such as the power on system test (POST). The device storing the bootstrap loader and other minimal initialization procedures is referred to as the boot device.
The nonvolatile memory may also include routines for communicating with input/output devices in the computer system. In some computer systems these routines are collectively referred to as the Basic Input Output System (BIOS). The BIOS provides a common interface so that software executing on the processor can communicate with input/output devices such as the keyboard, mouse, nonvolatile mass memory storage device, and other peripheral devices.
ROM based storage techniques for the boot code and BIOS tend to be inflexible with respect to modification. The BIOS provided with the system may have errors or be limited to handling certain kinds or types of peripheral devices. In order to modify the BIOS or boot code, the ROM containing the BIOS must be replaced. This may require partially disassembling the computer system to gain access to the ROM. The ROM may be difficult to replace if it is solder mounted.
ROMs, programmable read only memory (PROM), and electrically programmable read only memories (EPROMs) represent various types of nonvolatile semiconductor memories. Flash electrically erasable programmable read only memory (“flash memory”) is a type of rewritable nonvolatile semiconductor memory.
The use of flash memory for storing the BIOS and boot code permits greater flexibility in handling updates. For example, the BIOS can be updated by running a program thus eliminating the need to replace ROMs.
No provision is typically available for updating the boot code itself, however. If the boot code must begin at a pre-determined address, then the updated boot code must start at the same location as the current version of the boot code. Thus an update operation would effectively overwrite the current version of the boot code with the updated boot code. If a power loss occurs before the updated boot code can be written, both the current version and the updated boot code may be rendered unusable. If the boot code is corrupted, the system cannot boot and is typically rendered inoperable.
A passive solution to this problem is simply to provide no ready means of updating the boot code. As long as no physical impediment prevents modification of the range of memory containing the boot code, however, the computer system is exposed to a risk of intentional or inadvertent modification of the boot code. Inadvertent or intentional modification may result in rendering the computer inoperable until the nonvolatile memory is replaced. Even if a skilled user is intentionally attempting to modify the boot code, there is no provision for using the previous version of the boot code in the event of an unsuccessful programming attempt. If a power failure occurred during an attempted update to the boot code then both the old and the new version of the boot code may be corrupted. Thus the computer may be rendered inoperable until the nonvolatile memory is physically replaced.
Another technique designed to prevent corruption of the boot code is to have some portion of the rewritable nonvolatile memory locked so that its contents cannot be erased or modified. The locked portion typically contains the boot code but not the BIOS. Thus BIOS update software is able to update the BIOS with either a completely unlocked or a partially locked nonvolatile memory, but the boot code is not readily modified with either solution. The locked portion may even store special update code that is automatically used whenever the BIOS is corrupted. The special update code requests the user to provide some storage medium having a copy of the BIOS so that the BIOS can be updated from the storage medium. The special update code, however, does not provide any mechanism for replacing the boot code.
SUMMARY OF THE INVENTION
A method of updating code includes the step of writing code to a selected portion of a nonvolatile memory having a first portion associated with a first range of addresses and a second portion associated with a second range of addresses, wherein the selected portion is the second portion. A block selector is toggled to swap addresses of the first and second portions, wherein the first range of addresses reference the second portion of nonvolatile memory and the second range of addresses reference the first portion of nonvolatile memory.
An apparatus using the block selector includes a processor that initiates a boot sequence at a pre-determined address. An address decoder accesses the first block in response to the pre-determined address when the block selector has a first value. The address decoder accesses the second block in response to the pre-determined address when the block selector has a second value.
Another method includes the step of receiving an address from a processor. The address is decoded in accordance with a first value of a group selector to access a first group of at least one block of nonvolatile memory associated with a first range of addresses, wherein a second group of at least one block of nonvolatile memory is associated with a second range of addresses. The group selector is toggled to a second value, wherein the first range is associated with the second group and the second range is associated with the first group.
An apparatus using the group selector includes a nonvolatile memory having a plurality of blocks and an address decoder. The address decoder associates a first range of addresses with a first group of at least one block of nonvolatile memory and a second range of addresses with a second group of at least one block of nonvolatile memory if the group selector has a first value. The address decoder associates the first range with the second group and the second range with the first group if the group selector has a second value.
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Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Lee Thomas C.
Nguyen Nguyen
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