Methods and apparatus for signal modification in a...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Reexamination Certificate

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10436572

ABSTRACT:
A phase locked loop includes a buffer that synchronizes the transmission of the new count value to the completion of the previous count to avoid errors caused by dithering. The buffer is connected to a count input of the counter and transmits the new count upon receipt of the carryout signal from the counter. Alternatively, the transmission of the new value of N from the buffer is delayed after receipt by the buffer of a carryout signal from the counter. In another embodiment, a delayed version of the carryout signal is used to trigger the buffer to transmit the new count value to the counter. In another feature, a buffer synchronizes phase data to a reference signal before inputting it to a digital modulator of the phase locked loop.

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