Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-01-31
2006-01-31
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S105000, C710S310000, C370S902000, C370S912000, C709S230000
Reexamination Certificate
active
06993613
ABSTRACT:
Methods, apparatus, and articles of manufacture for efficiently handling incoming network traffic by preventing protocol stack overruns and minimizing packet latency are disclosed herein. Embodiments of the present invention monitor the level of a protocol stack's packet queue, and, in response to an increase in the level of the packet queue above an initial threshold value, disable the generation of receive interrupts from the communications interface, disable automatic packet indication of packets by the device driver to the protocol stack, and identify and indicate new incoming packets to the protocol stack at a rate equal to or less than the rate at which packets are being processed by the protocol stack. In addition, in response to a decrease in the level of the packet queue below an exit threshold value, the generation of receive interrupts and the automatic indication of packets to the protocol stack may be re-enabled.
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Connor Patrick L.
Luhmann Patrick J.
Blakely , Sokoloff, Taylor & Zafman LLP
Huynh Kim T.
Intel Corporation
Perveen Rehana
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