Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2008-09-23
2008-09-23
Portka, Gary J (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S147000, C711S152000
Reexamination Certificate
active
11037864
ABSTRACT:
A synchronization scheme is provided for a multiprocessor system. In particular, a processor includes a buffer sync controller. The buffer sync controller is operative to allow or deny access by a subprocessor to shared data in a shared memory, such that a processor seeking to write data into or read data from the shared memory must ascertain certain shared parameter data processed by the buffer sync controller.
REFERENCES:
patent: 4975833 (1990-12-01), Jinzaki
patent: 5434995 (1995-07-01), Oberlin
patent: 5519877 (1996-05-01), Yoneda
patent: 5634037 (1997-05-01), Sasaki et al.
patent: 5796946 (1998-08-01), Sakon
patent: 5983326 (1999-11-01), Hagersten et al.
patent: 6052763 (2000-04-01), Maruyama
patent: 6216174 (2001-04-01), Scott
patent: 6466988 (2002-10-01), Sukegawa
patent: 6557084 (2003-04-01), Freerksen et al.
patent: 2003/0043156 (2003-03-01), Macy et al.
patent: 2003/0088610 (2003-05-01), Kohn et al.
patent: 2004/0181636 (2004-09-01), Martin et al.
patent: 58-169659 (1983-10-01), None
patent: 08-016456 (1996-01-01), None
Japanese Office Action dated Oct. 2, 2007 corresponding to Japanese Patent Application No. 2006-006723, 4 pages.
J.B. Carter et al: “A Comparison of Software and Hardware Synchronization Mechanisms for Distributed Shared Memory Multiprocessors” Sep. 24, 1996, XP002466304, University of Utah; 24 Pages; retrieved from the internet: http://www.cs.utah.edu/research/techreports/1996/pdf/UUCS-96-011.pdf>.
Mellor-Crummey J M et al.: “Scalable reader-writer synchronization for shared-memory multiprocessors” ACM Sigplan Notices, ACM, Association for Computing Machinery, New York, NY, US, vol. 26, No. 7, Jul. 1991, pp. 106-113, XP002402085.
Inoue Keisuke
Yasue Masahiro
Lerner David Littenberg Krumholz & Mentlik LLP
Portka Gary J
Sony Computer Entertainment Inc.
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