Methods and apparatus for power control in a scalable array...

Details Methods and apparatus for power control in a scalable array... Methods and apparatus for power control in a scalable array...

2007-08-28

2007-08-28

Trujillo, James K. (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S323000, C713S322000, C713S320000, C713S300000

Reexamination Certificate

active

11128742

ABSTRACT:
Low power architecture features and techniques are provided in a scalable array indirect VLIW processor. These features and techniques include power control of a reconfigurable register file, conditional power control of multi-cycle operations and indirect VLIW utilization, and power control of VLIW-based vector processing using the ManArray register file indexing mechanism. These techniques are applicable to all processing elements (PEs) and the array controller sequence processor (SP) to provide substantial power savings.

REFERENCES:
patent: 5673321 (1997-09-01), Lee
patent: 5815696 (1998-09-01), Tanaka et al.
patent: 5831885 (1998-11-01), Mennemeier
patent: 5907714 (1999-05-01), Boutaud et al.
patent: 6016543 (2000-01-01), Suzuki et al.
patent: 7124160 (2006-10-01), Saulsbury et al.

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