Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-01-11
2005-01-11
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S173000, C713S001000
Reexamination Certificate
active
06842823
ABSTRACT:
A method and apparatus for persistent volatile computer memory. In one embodiment, the memory of a computer in partitioned into two regions, one directly accessible to the operating system and one accessible to the operating system only through an intermediary program such as a device driver. In another embodiment, the partitioning of computer memory is achieved through modifications to the computer's BIOS, preventing the operating system from directly addressing a region of volatile computer memory and protecting the contents of the region from modification during a boot cycle.
REFERENCES:
patent: 5155844 (1992-10-01), Cheng et al.
patent: 5255367 (1993-10-01), Bruckert et al.
patent: 5317752 (1994-05-01), Jewett et al.
patent: 5333303 (1994-07-01), Mohan
patent: 5359713 (1994-10-01), Moran et al.
patent: 5383161 (1995-01-01), Sanemitsu
patent: 5586291 (1996-12-01), Lasker et al.
patent: 5694583 (1997-12-01), Williams et al.
patent: 5720027 (1998-02-01), Sarkozy et al.
patent: 5794252 (1998-08-01), Bailey et al.
patent: 5799324 (1998-08-01), McNutt et al.
patent: 5819109 (1998-10-01), Davis
patent: 5875465 (1999-02-01), Kilpatrick et al.
patent: 5898869 (1999-04-01), Anderson
patent: 6119244 (2000-09-01), Schoenthal et al.
patent: 6181614 (2001-01-01), Aipperspach et al.
patent: 6397293 (2002-05-01), Shrader et al.
patent: 6434695 (2002-08-01), Esfahani et al.
patent: 6496942 (2002-12-01), Schoenthal et al.
patent: 6507906 (2003-01-01), Criddle et al.
patent: 6636963 (2003-10-01), Stein et al.
patent: 20020124040 (2002-09-01), Foster et al.
patent: 0 461924 (1991-12-01), None
patent: 0 483978 (1992-05-01), None
patent: 0 488366 (1992-06-01), None
patent: 0 488 366 (1992-06-01), None
patent: 0 642079 (1995-03-01), None
patent: 0 772136 (1997-05-01), None
patent: 0 772136 (1997-05-01), None
patent: WO 9512848 (1995-05-01), None
patent: 9512848 (1995-05-01), None
Annex to Form PCT/ISA/206 Communication Relating to the Results of the Partial International Search to International Application No.: PCT/US 01/12138 mailed on Nov. 27, 2000.
Nørv g, K. “The vagabond temporal OID index: an index structure for OID indexing in temporal object database systems.”2000 International Database Engineering and Applications Symposiumpp. 158-1666 (2000).
Form PCT/ISA/210 Patent Cooperation Treaty International Search Report to International Application No.: PCT/US02/11485 mailed Jul. 21, 2003.
Chen et al., “The Rio File Cache: Surviving Operating System Crashes”; University of Michigan, Department of Electrical Engineering & Computer Science; pp. 1-11.
Form PCT/ISA/210, International Search Report for International Application No. PCT/US01/12138, mailed on Mar. 26, 2002.
Bataille Pierre
Lahive & Cockfield LLP
Stratus Technologies Bermuda LTD
LandOfFree
Methods and apparatus for persistent volatile computer memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus for persistent volatile computer memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for persistent volatile computer memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3402062