Methods and apparatus for low power SRAM

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S203000

Reexamination Certificate

active

11218009

ABSTRACT:
Methods and apparatus provide for pre-charging a bit line and a complementary bit line of an SRAM memory cell of the SRAM memory to a voltage level below a power supply level, Vdd, of the SRAM memory prior to writing data to the memory cell.

REFERENCES:
patent: 5815432 (1998-09-01), Naffziger et al.
patent: 5828612 (1998-10-01), Yu et al.
patent: 6157577 (2000-12-01), McPartland
patent: 6741493 (2004-05-01), Christensen et al.

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