Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2005-11-29
2005-11-29
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S601000, C713S323000
Reexamination Certificate
active
06971036
ABSTRACT:
A method of producing a time delay is provided. The method is performed with an information processor having a first timer and a second timer. The information processor is capable of maintaining a sleep mode. The method involves using the second timer to measure the timeout for the first timer. The method also includes repetitively causing the information processor to enter the sleep mode so as to be awakened by the first timer reaching timeout to substantially produce a time delay while the second timer is disabled.
REFERENCES:
patent: 5584031 (1996-12-01), Burch et al.
patent: 5590341 (1996-12-01), Matter
patent: 5881361 (1999-03-01), Mannette et al.
patent: 5919259 (1999-07-01), Dahl
patent: 5937199 (1999-08-01), Temple
patent: 5969639 (1999-10-01), Lauf et al.
patent: 5973617 (1999-10-01), Reichmeyer et al.
patent: 6047380 (2000-04-01), Nolan et al.
patent: 6244121 (2001-06-01), Hunter
patent: 6311081 (2001-10-01), Northcutt et al.
patent: 6333939 (2001-12-01), Butler et al.
patent: 6457135 (2002-09-01), Cooper
patent: 6611922 (2003-08-01), Ozcetin et al.
patent: WO 02/17030 (2002-02-01), None
“Autonomous Micro-sensor Arrays for Process Control of Semiconductor Manufacturing Processes,” Darin Fisher, Mason Freed, Kameshwar Poolla and C. J. Spanos—U.C. Berkeley, Presented: Proceedings of the 38th Conference on Decision and Control- Dec. 7-10, 1999. Presentation on Dec. 10, 1999.
“Micro-sensor Arrays for Calibration, Control, and Monitoring of Semiconductor Manufacturing Processes,” Darin Fisher, Mason Freed, Kameshwar Poolla and C. J. Spanos—U.C. Berkeley, Presented: 1999 IEEE International Conference on Control Applications, Aug. 22-26, 1999. Presentation on Aug. 24, 1999.
U.S. Appl. No. 09/643,614, filed Mar. 22, 2001, Docket # AWS-002.
U.S. Appl. No. 60/285,439, filed Apr. 19, 2001, Docket # AWS-003.
U.S. Appl. No. 60/285,613, filed Apr. 19, 2001, Docket # AWS-004.
U.S. Appl. No. 10/126,497, filed Apr. 19, 2002, Docket # AWS-025.
Bae Ji H.
Lee Thomas
OnWafer Technologies
Williams Larry
LandOfFree
Methods and apparatus for low power delay control does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus for low power delay control, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for low power delay control will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3471288