Methods and apparatus for halting cores in response to...

Electrical computers and digital data processing systems: input/ – Interrupt processing – Handling vector

Reexamination Certificate

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Details

C710S048000, C710S260000, C710S268000, C713S320000, C713S324000

Reexamination Certificate

active

07913018

ABSTRACT:
A method includes halting at least one processing core of a computer system in response to a system management interrupt. The method further includes handling the system management interrupt with at least one other processing core of the computer system in response to determining that the at least one processing core is halted. An associated system and machine readable medium are also disclosed.

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