Methods and apparatus for generating passive testers from proper

Details Methods and apparatus for generating passive testers from proper Methods and apparatus for generating passive testers from proper

1998-04-03

2000-05-09

Hua, Ly V.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

717 4, G06F 1100

Patent

active

060618124

ABSTRACT:
Techniques and testers for testing a system U including the steps of (a) defining a formal specification of a logical property P that system U is required not to satisfy; (b) generating a passive testing module T based upon property P to monitor system U; (c) invoking a function F at specific invocation points during the execution of system U to compute an abstract representation of the state of system U at the current point of execution; (d) passing the abstract representation computed by function F to passive testing module T in order to determine whether the abstract representation of the execution of system U to the current point matches illegal property P; and (e) declaring a "fail" result if the abstract representation of the execution of system U to the current point matches illegal property P and declaring a "pass" result if the abstract representation of the execution of system U to the current point does not match illegal property P.

REFERENCES:
patent: 4694408 (1987-09-01), Zaleski
patent: 5446652 (1995-08-01), Peterson et al.
patent: 5640537 (1997-06-01), Jessen et al.

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