Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-06-27
2006-06-27
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S154000, C714S006130, C709S216000, C709S218000
Reexamination Certificate
active
07069392
ABSTRACT:
According to the present invention, methods and apparatus are provided for increasing the efficiency and effectiveness of communications between multiprocessor clusters. Mechanisms for improving the accuracy of information available to an interconnection controller are implemented in order to allow the interconnection controller to increase reliability and reduce latency in a multiple cluster system. Protocol extensions and link layer extensions are provided with packets to convey information between interconnection controllers of separate multiprocessor clusters.
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Glasco David B.
Kota Rajesh
Newawarker Shashank
Prasadh Guru
Zeitler Carl
Beyer Weaver & Thomas LLP
Newisys Inc.
Peugh Brian R.
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