Electrical computers and digital processing systems: memory – Storage accessing and control
Reexamination Certificate
2008-07-08
2008-07-08
Ellis, Kevin L (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
C711S152000
Reexamination Certificate
active
07398347
ABSTRACT:
A scalable reconfigurable register file (SRRF) containing multiple register files, read and write multiplexer complexes, and a control unit operating in response to instructions is described. Multiple address configurations of the register files are supported by each instruction and different configurations are operable simultaneously during a single instruction execution. For example, with separate files of the size 32×32 supported configurations of 128×32 bit s, 64×64 bit s and 32×128 bit s can be in operation each cycle. Single width, double width, quad width operands are optimally supported without increasing the register file size and without increasing the number of register file read or write ports.
REFERENCES:
patent: 6069489 (2000-05-01), Iwanczuk et al.
patent: 6643747 (2003-11-01), Hammarlund et al.
patent: 6966017 (2005-11-01), Evans
patent: 7054897 (2006-05-01), Hong
Pechanek Gerald George
Wolff Edward A.
Ahmed Hamdy S
Altera Corporation
Ellis Kevin L
Priest & Goldstein PLLC
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