Methods and apparatus for creating a programmable link delay

Details Methods and apparatus for creating a programmable link delay Methods and apparatus for creating a programmable link delay

2006-10-31

2006-10-31

Pert, Evan (Department: 2826)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C703S019000

Reexamination Certificate

active

07131093

ABSTRACT:
In a first aspect, a first method of creating a programmable link delay during cycle simulation of a system is provided. The first method includes the steps of (1) modeling a system for cycle simulation, wherein the system includes (a) a plurality of links; (b) link transmitting logic adapted to transmit data on the plurality of links; (c) link receiving logic adapted to receive data from the plurality of links; and (d) link training logic coupled to the link receiving logic and adapted to compensate for skew between links; and (2) employing delay logic, coupled to the plurality of links, in the modeled system to create a known skew between links during cycle simulation. Numerous other aspects are provided.

REFERENCES:
patent: 6611936 (2003-08-01), Jue et al.

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