Methods and apparatus for cache intervention

Details Methods and apparatus for cache intervention Methods and apparatus for cache intervention

2006-08-29

2006-08-29

Peugh, Brian R. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S130000, C711S122000, C711S152000

Reexamination Certificate

active

07100001

ABSTRACT:
Methods and apparatus for cache-to-cache block transfers (i.e., intervention) when the state of the transferred block is in a non-modified state (e.g., “exclusive” or “shared”) are provided. In one embodiment, a first cache holds the memory block in an “exclusive” state prior to the transfer. When a processor associated with a second cache attempts to read the block from a main memory, the first cache intervenes and supplies the block to the second cache. The state of the block in the first cache changes from “exclusive” to “shared.” In another embodiment, a processor associated with a third cache attempts to read the block from the main memory while the first cache and the second both hold the block in the “shared” state. Either the first cache or the second cache wins an arbitration and supplies the block to the third cache.

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