Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2007-01-16
2007-01-16
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S167000
Reexamination Certificate
active
10731996
ABSTRACT:
A method and apparatus for balancing memory access latency and bandwidth is generally described. In accordance with one example embodiment of the invention, a method comprising determining at least one characteristic of a memory request, and selectively leaving an accessed memory page open after a memory access based, at least in part, on the at least one characteristic for the memory request, to balance memory access latency and bandwidth of a subsequent memory request(s).
REFERENCES:
patent: 6378049 (2002-04-01), Stracovsky et al.
patent: 2002/0052798 (2002-05-01), Nishikado et al.
Parthasarathy Balaji
Smiley David
Crawford Ted A.
Intel Corporation
Iwashko Lev
Kim Matthew
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