Methods and apparatus for active termination of...

Details Methods and apparatus for active termination of... Methods and apparatus for active termination of...

2005-08-30

2005-08-30

Le, Don (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S083000

Reexamination Certificate

active

06937058

ABSTRACT:
An integrated circuit, comprising: at least one main circuit operable to perform one or more functions, and including at least one I/O node for receiving or transmitting an operating signal; an active termination circuit having first and second MOSFETs of the same type coupled in series across a Vdd node of a first source potential and a Vss node of a second source potential, the at least one I/O node being coupled to a common node between the first and second MOSFETs; and a control circuit operable to bias the first and second MOSFETs such that they exhibit a controlled impedance at the common node.

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patent: 6642741 (2003-11-01), Metz et al.
patent: 6720795 (2004-04-01), Partow et al.

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