Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-01-28
2009-10-20
Chaudry, M. Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C341S051000, C714S762000, C714S755000
Reexamination Certificate
active
07607073
ABSTRACT:
Methods, software, circuits and systems involving a low complexity, tailbiting decoder. The method relates to appending and/or prepending data subblocks to a serial data block, decoding and estimating starting and ending states for the serial data block, and when the starting and ending states are not identical, iterating the decoding and estimating step(s) and (eventually) disallowing at least one starting and/or ending state. The circuitry generally includes a buffer, tailbiting logic configured to append and/or prepend a subblock to the serial data block, a decoder configured to (i) decode the serial data block and (ii) estimate starting and ending states for the serial data block, and iteration logic configured to instruct the decoder to repeat the decoding and starting/ending state estimating functions when the starting and ending states are not identical. The invention advantageously reduces the complexity of a suboptimal convolutional decoder, increases the reliability of the starting and ending states, and may ensure smooth transitions at the data block ends during decoding, without adding any overhead to the transmitted data block.
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Cheong Kok-Wui
Lou Hui-Ling
Ahmed Enam
Chaudry M. Mujtaba K
Marvell International Ltd.
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