Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-03-21
1999-09-07
Lee, Thomas C.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711114, 39520049, 395683, G06F 1300, G06F 1700
Patent
active
059500140
ABSTRACT:
A method for dynamic reconfiguration of a message-passing interface from a Push model to a Pull model is disclosed. In the Push model, a host computer device moves data stored in a host local memory to an I/O peripheral shared memory, whereas in the Pull model, the I/O peripheral moves data from the host's shared memory to a local memory of the I/O peripheral. To dynamically reconfigure the message passing interface from the Push to the Pull model, the hosts waits for the I/O peripheral to cycle through power-on/reset, locates the I/O peripheral's inbound and outbound queues in memory, directs the I/O peripheral to clear its outbound queue of messages from previous inbound messages and initializes the allocated message frames as free messages. The host then posts a message to the I/O peripheral inbound queue instructing the I/O peripheral to initialize in the Pull model. The I/O peripheral then posts any messages currently being processed to the I/O peripheral outbound queue. Thereafter, the host posts the allocated free messages to the I/O peripheral inbound queue, and the I/O peripheral makes the free messages available as free messages for the host inbound queue.
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Liu, Lok Tin, David E. Culler; Evaluation fo the Intel Paragon on Active Message Communication; Proceedings of Intel Supercomputer Users Group Conference, pp. 1-21.
Henry Russell J.
Hickerson Roger
Bailey Wayne P.
Lee Thomas C.
LSI Logic Corporation
Mashaal Mohamed
Young Alan W.
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