Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1998-06-05
2000-10-03
Kim, Kenneth S.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711150, 712220, G06F 930
Patent
active
061287105
ABSTRACT:
Six instructions for the manipulation of discontinuous memory locations in a computer memory are described. They are: Compare and Load (CL), Compare and Swap (CS), Double Compare and Swap (DCS), Compare and Swap and Store (CSST), Compare and Swap and Double Store (CSDST), and Compare and Swap and Triple Store (CSTST). In each instruction a processor associates a programming-specified blocking symbol with a lock not accessible to software. The lock is used by any of these instructions only during its single instance of instruction execution, and the lock is made available (unlocked) at the end of each instance to then enable another blocking-symbol instruction instance to use the lock, thereby serializing concurrent multiple processor requests for accessing the same resource. Programming associates resources in a system with the unique blocking symbols. Each instance of these instructions executes an operand earlier prepared from a data value taken from the resource.. The data value is checked for change during the instance of execution when equality indicates no change since its preparation. These blocking-symbol instructions significantly increase the computer's speed of changing noncontiguous locations in a resource, compared to the time needed by software-protocol locks which must operate over a plurality of instances to make corresponding changes in a resource.
REFERENCES:
patent: 5428761 (1995-06-01), Herlihy et al.
patent: 5701501 (1997-12-01), Gandhi
patent: 5742785 (1998-04-01), Stone et al.
Greenspan Steven Jay
Plambeck Kenneth Ernest
Scalzi Casper Anthony
Ehrlich Marc A.
Goldman Bernard M.
Gonzalez Floyd A.
International Business Machines - Corporation
Kim Kenneth S.
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