Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2007-05-01
2007-05-01
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S216000
Reexamination Certificate
active
10422676
ABSTRACT:
The processing of instructions from multiple threads using a shared dispatch pipeline is controlled by invoking a dispatch flush operation wherein instructions of a selected thread in the shared dispatch pipeline are flushed in response to resource requirements. An exception condition detected in one thread can be resolved by issuing a following instruction for that thread. Until the exception condition is resolved, resources are not released that allow the second thread to dispatch which in turn prevents dispatch from the first thread to resolve the exception condition. A flush of the first thread is not issued to resolve the stall. Instead, a dispatch flush of the second thread is issued. If a second thread instruction has long latency resource requirements that prevent the first thread from dispatching to resolve the exception, then a hold is issued controlling when the second thread instruction is refetched.
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Burky William E.
Kalla Ronald N.
Sinharoy Balaram
Ward, III John W.
Chan Eddie
Huisman David J.
International Business Machines - Corporation
Winstead PC
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