Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2005-06-22
2009-06-09
Tsai, Sheng-Jen (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
Reexamination Certificate
active
07546434
ABSTRACT:
A method is disclosed to write data to an information storage and retrieval system comprising (n) volumes and a data cache, where that information storage and retrieval system is capable of communicating with one or more host computers. The method receives from a host computer an update for the (i)th volume, and determines the (i)th delay, where that (i)th delay is associated with the (i)th volume. The method then writes the update to said data cache interposing the (i)th delay without indicating to said host computer that the information storage and retrieval system is unavailable.
REFERENCES:
patent: 5926834 (1999-07-01), Carlson et al.
patent: 5991835 (1999-11-01), Mashimo et al.
patent: 2004/0030837 (2004-02-01), Geiner et al.
McClure Alan G.
Micka William F.
Stanley Warren K.
Chrzanowski Matthew R
International Business Machines - Corporation
Quarles & Brady LLP
Regelman Dale F.
Tsai Sheng-Jen
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