Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-10-16
2007-10-16
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10798046
ABSTRACT:
A technique for improving multiple critical timing paths that exhibit similar characteristics has been discovered. The technique efficiently improves multiple critical timing paths by reducing the number of unique critical timing path patterns for analysis. In some embodiments of the present invention a method for use in connection with an integrated circuit design includes identifying distinct timing paths of the integrated circuit design. The distinct timing paths have timing violations. The method includes associating a first plurality of the distinct timing paths with a first set of timing paths. Individual ones of the first plurality belonging to a second set of timing paths and include a first common characteristic. The method includes improving the first set of timing paths based at least in part on an improvement to an individual timing path of the first set of timing paths.
REFERENCES:
patent: 6425114 (2002-07-01), Chan et al.
patent: 6701289 (2004-03-01), Garnett et al.
patent: 6766504 (2004-07-01), Rahut et al.
patent: 7069528 (2006-06-01), Kovacs et al.
patent: 2005/0050496 (2005-03-01), Kovacs et al.
Amin Dakshesh
Kim Von-Kyoung
Lai Peter F.
Satakopan Sriram
Dorsey & Whitney LLP
Siek Vuthe
Sun Microsystems Inc.
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