Etching a substrate: processes – Masking of a substrate using material resistant to an etchant – Mask resist contains inorganic material
Reexamination Certificate
1994-08-04
2002-08-13
Alanko, Anita (Department: 1746)
Etching a substrate: processes
Masking of a substrate using material resistant to an etchant
Mask resist contains inorganic material
C216S067000, C216S075000, C216S077000, C216S079000, C216S062000, C438S720000, C438S723000, C438S724000, C438S766000, C438S770000, C438S945000, C148SDIG001
Reexamination Certificate
active
06432317
ABSTRACT:
NOTICE
(C) Copyright, *M* Texas Instruments Incorporated 1991. A portion of the disclosure of this patent document contains material which is subject to copyright and mask work protection. The copyright and mask work owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright and mask work rights whatsoever.
FIELD OF THE INVENTION
This invention generally relates to semiconductor devices and in particular for masking methods to form submicron features.
BACKGROUND OF THE INVENTION
The semiconductor industry is constantly striving to achieve higher density electronic devices. As the industry has moved into micron and submicron sized features to achieve higher densities, the need for improved masking methods to create such minute features has increased.
One way to achieve high resolution of a submicron sized feature is to increase the numerical aperture of the optical imaging system used to produce a patterned image of the feature. Unfortunately, increasing the numerical aperture of the imaging system to achieve higher resolution results in a drastically reduced depth of field.
Other problems are associated with conventional masking techniques, such as a lack of uniformity of exposure of resist through a thick layer of resist and scattered light within the layer of resist due to reflective metallized surfaces under the resist. These problems tend to compound the loss of resolution problem by creating ill-defined patterns at the onset. Thus, there is a need for a method for forming high resolution submicron sized features on a semiconductor device.
SUMMARY OF THE INVENTION
This is a method for masking a structure for patterning micron and submicron features, the method comprises: forming at least one monolayer of adsorbed molecules on the structure; prenucleating portions of the adsorbed layer by exposing the portions corresponding to a desired pattern of an energy source; and selectively forming build-up layers over the prenucleated portions to form a mask over the structure to be patterned.
Preferably the adsorbed layer is removed from the structure, except at prenucleating sites, before the build-up layers are formed; and a portion of the structure is etched to form patterned micron or submicron features. Also, the prenucleated portions and the build-up layers, if not destructive to the performance of the final structure, may be left as a portion of said final structure; the build-up layers may be used to pattern an organic etch resist; the structure may be a single layer substrate or at least one layer over a substrate layer; the energy source may be a radiant energy source or a particle energy source; the prenucleated portions and/or the build-up layers may be formed in a vacuum chamber, may be formed from an energy dissociable gas, and may be metal.
REFERENCES:
patent: 4282647 (1981-08-01), Richman
patent: 4426247 (1984-01-01), Tamamura et al.
patent: 4560421 (1985-12-01), Maeda et al.
patent: 4566937 (1986-01-01), Pitts
patent: 4608117 (1986-08-01), Ehrlich et al.
patent: 4612085 (1986-09-01), Jelks et al.
patent: 4615904 (1986-10-01), Ehrlich et al.
patent: 4626315 (1986-12-01), Kitamoto et al.
patent: 4677736 (1987-07-01), Brown
patent: 4713258 (1987-12-01), Umemura
patent: 4745089 (1988-05-01), Orban
patent: 4897150 (1990-01-01), Dooley et al.
patent: 4908226 (1990-03-01), Kubena et al.
patent: 4981770 (1991-01-01), Taylor
patent: 5091337 (1992-02-01), Watanabe et al.
patent: 5110760 (1992-05-01), Hsu
patent: 3942472 (1989-12-01), None
patent: 0172604 (1986-02-01), None
patent: 0184352 (1986-06-01), None
patent: 0470784 (1992-02-01), None
patent: 2319926 (1977-02-01), None
patent: 8304269 (1983-12-01), None
Deutsch, T. F., et al.Appl.Phys.Lett. 35(2) Jul. 15, 1979 pp. 175-177.*
Makoto Nakase,Potential of Optical Lithography, Optical Engineering/Apr. 1987/vol. 26 No. 4, pp. 319-324.
E. Ong and E.L. Hu.,Multilayer Resists for Fine Line Optical Lithography, Solid State Technology/Jun. 1984, pp, 155-160.
M. J. Bowden,Forefron of Research on Resists, Solid State Technology/Jun. 1981, pp. 73-87.
Gene E. Fuller,Optical Lithography Status, Solid State Technology/Sep. 1987, pp. 113-118.
Yukinori Ochiai, et al.,Focused Ion Beam Technology, Solid State Technology/Nov. 1987, pp. 75-79.
W. R. Brunsvold, et al.,Resist Technology for Submicrometer Optical Lithography, Optical Engineering/Apr. 1987/vol. 26 No. 4, pp. 330-336.
Douglas Monte A.
Stoltz Richard A.
Alanko Anita
Brady III Wade James
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Method to produce masking does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method to produce masking, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to produce masking will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2941658