Method to produce masking

Etching a substrate: processes – Masking of a substrate using material resistant to an etchant – Mask resist contains inorganic material

Reexamination Certificate

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Details

C216S067000, C216S075000, C216S077000, C216S079000, C216S062000, C438S720000, C438S723000, C438S724000, C438S766000, C438S770000, C438S945000, C148SDIG001

Reexamination Certificate

active

06432317

ABSTRACT:

NOTICE
(C) Copyright, *M* Texas Instruments Incorporated 1991. A portion of the disclosure of this patent document contains material which is subject to copyright and mask work protection. The copyright and mask work owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright and mask work rights whatsoever.
FIELD OF THE INVENTION
This invention generally relates to semiconductor devices and in particular for masking methods to form submicron features.
BACKGROUND OF THE INVENTION
The semiconductor industry is constantly striving to achieve higher density electronic devices. As the industry has moved into micron and submicron sized features to achieve higher densities, the need for improved masking methods to create such minute features has increased.
One way to achieve high resolution of a submicron sized feature is to increase the numerical aperture of the optical imaging system used to produce a patterned image of the feature. Unfortunately, increasing the numerical aperture of the imaging system to achieve higher resolution results in a drastically reduced depth of field.
Other problems are associated with conventional masking techniques, such as a lack of uniformity of exposure of resist through a thick layer of resist and scattered light within the layer of resist due to reflective metallized surfaces under the resist. These problems tend to compound the loss of resolution problem by creating ill-defined patterns at the onset. Thus, there is a need for a method for forming high resolution submicron sized features on a semiconductor device.
SUMMARY OF THE INVENTION
This is a method for masking a structure for patterning micron and submicron features, the method comprises: forming at least one monolayer of adsorbed molecules on the structure; prenucleating portions of the adsorbed layer by exposing the portions corresponding to a desired pattern of an energy source; and selectively forming build-up layers over the prenucleated portions to form a mask over the structure to be patterned.
Preferably the adsorbed layer is removed from the structure, except at prenucleating sites, before the build-up layers are formed; and a portion of the structure is etched to form patterned micron or submicron features. Also, the prenucleated portions and the build-up layers, if not destructive to the performance of the final structure, may be left as a portion of said final structure; the build-up layers may be used to pattern an organic etch resist; the structure may be a single layer substrate or at least one layer over a substrate layer; the energy source may be a radiant energy source or a particle energy source; the prenucleated portions and/or the build-up layers may be formed in a vacuum chamber, may be formed from an energy dissociable gas, and may be metal.


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