Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1998-10-13
2000-05-30
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438694, 438695, 438700, 438756, 438757, H01L 21302
Patent
active
060690828
ABSTRACT:
A method of fabrication of a metal lines without dishing using damascene and chemical-mechanical polish processes. A Key feature is the hard cap layer that is only formed over the trench opening. The hard cap layer prevents dishing of the metal line and also allows faster CMP than blanket polish stop layers. The method includes forming a first dielectric layer having a first trench opening over a semiconductor structure. A metal layer is deposited in the first trench opening. The metal layer has a dimple. The metal layer is preferably composed of Al or Cu. A hard mask is formed having a first opening over the first trench opening. The first opening is at least partially over first trench opening. A hard cap layer (e.g., W or WSi.sub.x) is selectively deposited on the metal layer exposed in the first opening. The hard cap layer, the hard mask, and the metal layer are chemical-mechanical polished to completely remove the hard mask resulting in a metal line having a "dishing free" flat top surface. The chemical-mechanical polish rate of the hard cap is less than the rate of the metal layer.
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Sudijono John Leonard
Wong Harianto
Chartered Semiconductor Manufacturing Ltd.
Pike Rosemary L.S.
Saile George O.
Stoffel William J.
Tran Binh X.
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