Method to optimize p-channel CMOS ICs using Q.sub.bd as a monito

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed

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438530, H01L 2100, G01R 3126

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058175369

ABSTRACT:
A method to monitor boron penetration and optimize process parameters in the fabrication of a semiconductor device have an n.sup.+ or a p.sup.- -polysilicon gate. The charge-to-breakdown Q.sub.BD value is used to monitor the boron penetration into the polysilicon/gate oxide interface. Values of Q.sub.BD for various values of process parameters are determined and optimized values for these process parameters are derived.

REFERENCES:
patent: 5023561 (1991-06-01), Hillard
patent: 5598102 (1997-01-01), Smayling et al.
patent: 5650336 (1997-07-01), Eriguchi et al.

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