Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2005-07-26
2005-07-26
Thompson, Craig A. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S751000, C257S774000
Reexamination Certificate
active
06921978
ABSTRACT:
The invention provides a method of forming a wiring layer in an integrated circuit structure that forms an organic insulator, patterns the insulator, deposits a liner on the insulator, and exposes the structure to a plasma to form pores in the insulator in regions next to the liner. The liner is formed thin enough to allow the plasma to pass through the liner and form the pores in the insulator. During the plasma processing, the plasma passes through the liner without affecting the liner. After the plasma processing, additional liner material may be deposited. After this, a conductor is deposited and excess of portions of the conductor are removed from the structure such that the conductor only remains within patterned portions of the insulator. This method produces an integrated circuit structure that has an organic insulator having patterned features, a liner lining the patterned features, and a conductor filling the patterned features. The insulator includes pores along surface areas of the insulator that are in contact with the liner and the pores exist only along the surface areas that are in contact with the liner (the liner is not within the pores).
REFERENCES:
patent: 6596467 (2003-07-01), Gallagher et al.
patent: 2004/0026783 (2004-02-01), Kloster et al.
Clevenger Lawrence A.
Greco Stephen E.
Kwietniak Keith T.
Seo Soon-Cheon
Wang Yun-Yu
Blecker, Esq. Ira D.
Pham Thanhha
Thompson Craig A.
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