Method to fabricate the thin film transistor

Details Method to fabricate the thin film transistor Method to fabricate the thin film transistor

1996-04-19

1999-08-24

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438164, 438488, H01L 21336

Patent

active

059435607

ABSTRACT:
Ultrahigh vacuum chemical vapor deposition (UHV/CVD) and chemical mechanical polishing (CMP) systems are used in a method which can fabricate polycrystalline silicon (poly-Si) and polycrystalline silicon-germanium (poly-Si.sub.1-x -Ge.sub.x) thin film transistors at low temperature and low thermal budget. Poly-Si and poly-Si.sub.1-x -Ge.sub.x can be deposited by UHV/CVD without any anneal step. And due to the ultra low base pressure and ultraclean growth environment, the As-deposited poly films have low defect densities. However, the surface morphology retards the usage of the fabricating top-gate poly TFT's. In this invention, the CMP system is used for improving the surface morphology, high performance poly-Si and poly-Si.sub.1-x -Ge.sub.x TFT's can be obtained.

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