Fishing – trapping – and vermin destroying
Patent
1994-05-06
1997-02-04
Fourson, George
Fishing, trapping, and vermin destroying
437193, 437226, 437977, H01L 2128
Patent
active
055997465
ABSTRACT:
A method for eliminating the peeling of polycide at the edge of a wafer used to fabricate semi-conductors and integrated circuits. A global rough surface is formed on the wafer. The rough surface on the substrate wafer releases most of the thermal stress between the silicide and polysilicon layers which are found in conventional devices. A "peel free" surface results and the particle problem is lessened.
REFERENCES:
patent: 3615956 (1971-10-01), Irving et al.
patent: 3739463 (1973-06-01), Aird et al.
patent: 4610079 (1986-09-01), Abe et al.
S. Wolf, "Silicon Processing For the VLSI Era, vol. I," Lattice Press, 1986, pp. xxiii-xxiv.
Lur Water
Wu Der-Yuan
Bilodeau Thomas G.
Fourson George
United Microelectronics Corporation
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