Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2000-08-29
2003-11-25
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S764000, C711S140000
Reexamination Certificate
active
06654925
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to symmetrical computer systems, and particularly to an apparatus for comparing corrected data with uncorrected data in a pipeline to allow for the retry of the operation without additional pipeline delay associated with inline correction.
TRADEMARKS
S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
BACKGROUND
In an SMP Computer System, there are often several levels of cache which are serviced by queues or pipelines. Because of demands for high-performance and high-bandwidth, it is vital that these pipelines are as short as possible. However, with e-commerce and worldwide trade, it is also critical to keep these SMP machines available all the time. This means that defects, such as array soft failures, need to be protected by schemes such as error correction codes (ECC). In the past, the directory, an array used to look-up cache entries within the pipeline, fed ECC logic that corrected the directory address prior to the look-up function for the cache.
However, ECC logic tends to take a long time and tends to lengthen the pipeline. Therefore, computer manufacturers sometimes trade off performance for reliability/availability.
SUMMARY OF THE INVENTION
In accordance with the preferred embodiment of the invention, the pipeline is split into two parallel pipelines after the directory array. One branch bypasses the ECC logic and begins the compare function for the look-up immediately. Since the data is most often correct, this path will be exercised most often. The other path performs the ECC function by correcting the address. Then, it does the compare for the look-up based on the corrected address.
It is very rare that a single-bit error occurs. If one does, it is very rare that the one bit will affect the compare look-up results. If the look-up results are different, the operation needs to be canceled and retried. The preferred embodiment cancels the current operation and retries the pipe pass with the corrected address and compare results supplied to the pipe. That way, the second pass can also bypass the ECC logic and the compare results are used directly, still keeping the pipeline short.
There is a rare case where the preferred embodiment allows for the directory to change between the first pass in the pipe and the retry pass. If that happens, the preferred embodiment allows for the retry of the entire pipeline since the corrected address information from the first pass is no longer valid.
These and other improvements are set forth in the following detailed description. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.
REFERENCES:
patent: 5307356 (1994-04-01), Fifield
patent: 5912916 (1999-06-01), Wu et al.
patent: 2002/0147722 (2002-10-01), Banerjee
Mak Pak-kin
Meaney Patrick J.
Augspurger Lynn L.
Dildine R. Stephen
International Business Machines - Corporation
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