Abrading – Precision device or process - or with condition responsive... – With indicating
Reexamination Certificate
2000-11-28
2003-04-08
Hail, III, Joseph J. (Department: 3723)
Abrading
Precision device or process - or with condition responsive...
With indicating
C451S278000, C451S009000
Reexamination Certificate
active
06544103
ABSTRACT:
TECHNICAL FIELD
The invention relates generally to semiconductor manufacturing, and more specifically to a method to determine the optimum geometry of a multizone carrier used for retaining and pressing a semiconductor wafer against a polishing pad in a chemical-mechanical polishing tool.
BACKGROUND OF THE INVENTION
A flat disk or “wafer” of single crystal silicon is the basic substrate material in the semiconductor industry for the manufacture of integrated circuits. Semiconductor wafers are typically created by growing an elongated cylinder or boule of single crystal silicon and then slicing individual wafers from the cylinder. The slicing causes both faces of the wafer to be extremely rough. The front face of the wafer on which integrated circuitry is to be constructed must be extremely flat in order to facilitate reliable semiconductor junctions with subsequent layers of material applied to the wafer. Also, the material layers (deposited thin film layers usually made of metals for conductors or oxides for insulators) applied to the wafer while building interconnects for the integrated circuitry must also be made a uniform thickness.
Planarization is the process of removing projections and other imperfections to create a flat planar surface, both locally and globally, and/or the removal of material to create a uniform thickness for a deposited thin film layer on a wafer. Semiconductor wafers are planarized or polished to achieve a smooth, flat finish before performing process steps that create integrated circuitry or interconnects on the wafer. A considerable amount of effort in the manufacturing of modern complex, high density multilevel interconnects is devoted to the planarization of the individual layers of the interconnect structure. Nonplanar surfaces create poor optical resolution of subsequent photolithography processing steps. Poor optical resolution prohibits the printing of high density lines. Planar interconnect surface layers are required in the fabrication of modern high density integrated circuits. To this end, CMP tools have been developed to provide controlled planarization of both structured and unstructured wafers.
A carrier in a CMP tools is used to retain a wafer and press against the back surface of the wafer so that the front surface of the wafer is pressed against a polishing pad in the presence of slurry. The amount of pressure at each point on the back surface of the wafer directly affects the amount of pressure between each point on the front surface of the wafer and the polishing pad. This relationship is important because the polishing removal rate at each point on the front surface of the wafer is proportional to the pressure on that point.
In general, it is desirable to remove material from the front surface of the wafer in a substantially uniform manner by applying a uniform pressure on the back surface of the wafer. However, thickness variations in incoming wafers, nonuniform slurry distribution, different motions for different points on the front surface of the wafer and other problems cause nonuniform planarization results. The nonuniform planarization results are typically manifested as concentric bands on the front surface of the wafer were greater or lesser amounts of material were removed. It may therefore be desirable to have different pressures on different concentric bands to create a desired removal rate profile.
Carriers able to provide different pressures on different concentric bands on the back surface of the wafer are referred to as multizone carriers. Multizone carriers can affect the polishing removal rate by applying different polishing pressures on different zones thereby creating a pressure distribution profile. Multizone carriers are typically able to apply different pressures on different zones by having two or more plenums that may be individually pressurized. Each plenum corresponds to a zone or concentric band on the back surface of the wafer. The individually pressurized plenums press against the bands on the back surface of the wafer in order to control the pressures on the front surface of the wafer. The pressure profile on the back surface of the wafer is related to the pressure profile between the front surface of the wafer and the polishing pad and thus the material removal rate profile on the front surface of the wafer. It is therefore highly desirable to be able to apply, as closely as possible, an optimum pressure profile on the back surface of the wafer to produce a desired material removal rate profile on the front surface of the wafer.
Applicant has discovered that the geometry (position and width) for a given number of zones within a multizone carrier limits the possible pressure profiles that may be applied to the back surface of the wafer. Additional zones may be added to the multizone carrier design to improve the flexibility in generating different pressure profiles, but the additional zones greatly increase the expense and complexity of the carrier. Thus, the number of zones that may be designed into the carrier is often limited by external factors. It is therefore important to choose a geometry that allows, as close as possible, an optimum pressure profile to be applied to the back surface of the wafer with a limited number of zones.
What is needed is a method to determine the optimum geometry of a multizone carrier for a particular CMP process.
SUMMARY OF THE INVENTION
The invention is a method for optimizing the geometry of a plurality of zones in a multizone carrier used in a CMP process. This allows a multizone carrier, with a limited number of zones, to be designed that is able to apply, as closely as possible, an optimum pressure distribution profile on the back surface of a wafer.
A typical pre-CMP thickness profile needs to be found for the incoming wafers. The process prior to the CMP process, usually a deposition process, will typically leave concentric troughs and bulges of material on the incoming wafers. By measuring wafers representative of expected incoming wafers and averaging the results, a typical thickness profile may be calculated.
A desired post-CMP thickness profile for the wafers must also be found. The desired post-CMP thickness profile is dependent on the needs of the overall manufacturing process for the wafer. A specific example of a post-CMP profile is a layer with a flat surface of a particular thickness.
A polishing removal profile for a given CMP process must also be found. This may be done by polishing a wafer using a single-zone carrier. This data will reveal how uniformly the planarization process itself removes material from the front surface of the wafer. CMP processes, even when a uniform pressure is placed on the back surface of the wafer, are commonly nonuniform. The required polishing removal profile takes the nonuniformity of the CMP process into account for the design of the multizone carrier.
An optimum pressure profile may be calculated by subtracting the desired post-CMP thickness profile from the typical incoming thickness profile and dividing the remainder by the polishing removal profile. The optimum pressure profile will generally be impossible to achieve with a multizone carrier. However, a carrier with an optimum geometry will be able to apply a pressure profile that is as close as possible for a given limited number of zones within the carrier. The optimum geometry of the zones may be calculated using a multidimensional optimization procedure.
REFERENCES:
patent: 6343973 (2002-02-01), Somekh
Grant Alvin J.
Hail III Joseph J.
Ingrassia Fisher & Lorenz P.C.
Speedfam-Ipec Corporation
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