Method to control spacer width

Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed

Reexamination Certificate

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Details

C438S008000, C438S009000, C438S016000, C438S696000, C438S704000, C438S750000

Reexamination Certificate

active

07001784

ABSTRACT:
A method of fabricating final spacers having a target width comprises the following steps. Initial spacers, each having an initial width that is less than the target width, are formed over the opposing side walls of a gate electrode portion. The difference between the initial spacer width and the target width is determined. A second spacer layer having a thickness equal to the determined difference between the initial width of the initial spacers and the target width is formed upon the initial spacers and the structure. The second spacer layer is etched to leave second spacer layer portions extending from the initial spacers to form the final spacers.

REFERENCES:
patent: 5863824 (1999-01-01), Gardner et al.
patent: 5879998 (1999-03-01), Krivokapic
patent: 5899722 (1999-05-01), Huang
patent: 6190961 (2001-02-01), Lam et al.
patent: 6268253 (2001-07-01), Yu
patent: 6492275 (2002-12-01), Riley et al.

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