Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-05-13
2008-05-13
Bragdon, Reginald G. (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C710S022000, C711S205000, C711S207000
Reexamination Certificate
active
07373479
ABSTRACT:
A method, system, and computer instructions for providing valid translation entries in the TCE table for all supported DMA addresses to prevent the occurrence of system errors due to prefetching. The mechanism of the present invention reserves a page in system memory. This reserved page is made unavailable to the operating system and may not be utilized by any software in the system. The reserved page is also written with all bytes set to 0xFF. The system firmware then selects a region in system memory for the TCE table. The TCE table is initialized, with all entries within the TCE table initialized to be valid as well as contain the corresponding address of the reserved page. In this manner, all supported DMA page addresses will have valid TCE entries which translate the DMA addresses into the reserved page memory. Thus, prefetched DMA addresses will not encounter invalid DMA address translation, and crash the system.
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patent: 6981120 (2005-12-01), Barrus et al.
patent: 2002/0124063 (2002-09-01), Foster et al.
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Andrew Tanenbaum and Albert Woodhull, Operating System: Design and Implementation, 1997, Prentice Hall, Second Edition, pp. 327-329.
Bragdon Reginald G.
Fay III Theodore D.
Gerhardt Diana R.
Gu Shawn X.
International Business Machines - Corporation
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