Method to achieve STI planarization

Details Method to achieve STI planarization Method to achieve STI planarization

2005-03-22

2005-03-22

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S296000, C438S692000

Reexamination Certificate

active

06869857

ABSTRACT:
A new method of forming shallow trench isolations without using CMP is described. A plurality of isolation trenches are etched through an etch stop layer into the semiconductor substrate leaving narrow and wide active areas between the trenches. An oxide layer is deposited over the etch stop layer and within the trenches using a high density plasma chemical vapor deposition process (HDP-CVD) having a deposition component and a sputtering component wherein after the oxide layer fills the trenches, the deposition component is discontinued while continuing the sputtering component until the oxide layer is at a desired depth. In one method, the oxide layer overlying the etch stop layer in the wide active areas is etched away. The etch stop layer and oxide layer residues are removed to complete planarized STI regions. In another method, a second etch stop layer is deposited over the oxide layer using a HDP-CVD process whereby the second etch stop layer is sputtered away over the oxide layer overlying the first etch stop layer in the narrow active areas and whereby the second etch stop layer remains in the wide active areas. The second etch stop layer over the oxide layer in the wide active areas is etched away. The oxide layer overlying the first etch stop layer in the narrow and wide active areas is etched away. The first and second etch stop layers are removed to complete STI regions.

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