Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-31
2006-01-31
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06993729
ABSTRACT:
A statement in at least one hardware definition language (HDL) file specifies a plurality of design entities representing a functional portion of a digital system. The plurality of design entities have an associated plurality of configuration latches each having a plurality of different possible latch values, where different sets of latch values for the plurality of configuration latches correspond to different configurations of the functional portion of the digital system. With a statement in the at least one HDL file, a Dial group entity is associated with one of the plurality of design entities. The Dial group entity has a Dial list listing a plurality of Dial entities whose settings collectively control which set of latch values is loaded into the plurality of configuration latches. Membership in the Dial group constrains all instances of the plurality of Dial entities belonging to a particular instance of the Dial group to be set as a group.
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Nelson Bradley
Roesner Wolfgang
Shen Hugh
Williams Derek Edward
Dillon & Yudell LLP
Dinh Paul
Salys Casimer K.
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