Method, system and program product for implementing a...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000, C703S015000

Reexamination Certificate

active

10425080

ABSTRACT:
In at least one hardware definition language (HDL) file, a design entity containing a functional portion of a digital system is specified. The design entity logically contains a plurality of configuration latches each having multiple different possible latch values. The latch values of the plurality of configuration latches collectively define at least a portion of a configuration of the functional portion of the digital system. With a statement in the at least one HDL file, a read-only Dial entity is associated with the plurality of configuration latches. The read-only Dial has at least one output and a mapping table indicating a mapping between each of a plurality of possible output values that can be present at the output and a respective corresponding setting of the read-only Dial. The setting of the read-only Dial indicates which of a plurality of different possible configurations is represented by the latch values of the plurality of configuration latches.

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