Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2002-03-25
2004-11-16
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C710S038000, C714S006130
Reexamination Certificate
active
06820172
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system, method, and program for processing Input/Output (I/O) requests to a storage space having a plurality of storage devices.
2. Description of the Related Art
In a storage loop architecture, such as the Serial Storage Architecture (SSA), a plurality of disks are interconnected to one or more adaptors so that either of the adaptors can access the one or more loops of interconnected disks. An adaptor may include two or more ports to allow connection to one or more loops. For each loop on which the adaptor communicates, one adaptor port connects to a first disk in the loop and the other port connects to another disk in the loop. Additional adaptors may be added to the loop, such that one port on each other adaptor connects to one disk and another port connects to another disk so that the additional adaptors are placed within the loop. One or more computer systems, such as storage subsystems, host system, etc., may include the adaptors connecting to the loop. Additional details of the SSA architecture and different possible loop topologies are described in the International Business Machines Corporation (IBM) publication “Understanding SSA Subsystems in Your Environment”, IBM document no. SG24-5750-00 (April, 2000).
In prior art SSA configurations, host systems will typically go through one of the available adaptors to access the disks or devices in the SSA loop. The disks in an SSA loop including two host adaptors may be configured with one or more Redundant Array of Independent Disks (RAID) ranks. In RAID systems, data is written in a stripe unit across a disk, where the blocks in a stripe are distributed across the multiple disks assigned to the RAID rank. In current SSA configurations, one host adaptor handles data access requests to a RAID rank, such that the one host adaptor will read and write data to all the disks in a stripe unit.
There is a continued need in the art to improve data access performance in device configurations, such as disks organized in a loop architecture.
SUMMARY OF THE PREFERRED EMBODIMENTS
Provided are a method, system, and program for processing Input/Output (I/O) requests to a storage space having a plurality of storage devices. An I/O request is received directed to target locations in a plurality of the storage devices, wherein the storage space includes at least two adaptors and wherein each adaptor is capable of separately executing an I/O request against at least one of the storage devices. Component I/O requests are generated to the target location in each of the storage devices. The component I/O requests for the different storage devices are transmitted to a plurality of adaptors, wherein each adaptor separately executes the component I/O request against one storage device to access the target location.
Further, the adaptors may concurrently execute the component I/O requests against the storage devices.
In certain implementations, the storage devices including the locations subject to the I/O request are configured within a Redundant Array of Independent Disks (RAID) rank. The target locations form a stripe unit in the RAID rank.
In still further implementations, the adaptors and storage devices are arranged in a loop architecture.
Further provided are a method, system, and program for processing Input/Output (I/O) requests to a storage space having a plurality of storage devices. An Input/Output (I/O) request is received directed to a target location in a target storage device in the storage space, wherein the storage space includes at least two adaptors providing access to the storage devices. A determination is made of a plurality of paths to the target storage device, wherein a path comprises one adaptor or one adaptor and at least one intervening storage device. A determination is made of a characteristic of each determined path. One path is selected based on the determined characteristic and the I/O request is transmitted to the adaptor in the selected path.
In further implementations, determining the characteristic comprises estimating performance of the path.
In still further implementations, estimating the performance comprises determining a number of intervening storage devices in the path between the adaptor and the target storage device. Further, estimating the performance may also include determining a number of I/O operations being processed by the adaptor in the path.
The described implementations provide techniques for selecting a path to reach a target storage device subject to an I/O request when the storage device may be accessed through separate adaptors. In certain implementations, multiple adaptors are used to concurrently access storage devices subject to a single I/O request. Still further, the implementations may be used to select one of multiple paths to a target storage device based on characteristics of the path, such as the performance of the path.
REFERENCES:
patent: 5051887 (1991-09-01), Berger et al.
patent: 5664219 (1997-09-01), Glassen et al.
patent: 5768623 (1998-06-01), Judd et al.
patent: 5848241 (1998-12-01), Misinai et al.
patent: 5931958 (1999-08-01), Bouvier et al.
patent: 6006342 (1999-12-01), Beardsley et al.
patent: 6061274 (2000-05-01), Thibault et al.
patent: 6061750 (2000-05-01), Beardsley et al.
patent: 6138187 (2000-10-01), Denning et al.
patent: 6145028 (2000-11-01), Shank et al.
patent: 6151659 (2000-11-01), Solomon et al.
patent: 6195730 (2001-02-01), West
patent: 6282610 (2001-08-01), Bergsten
patent: 6401170 (2002-06-01), Griffith et al.
patent: 6438595 (2002-08-01), Blumenau et al.
patent: 6513097 (2003-01-01), Beardsley et al.
patent: 6542944 (2003-04-01), D'Errico
patent: 6574667 (2003-06-01), Blumenau et al.
patent: 2002/0035666 (2002-03-01), Beardsley et al.
patent: 2003/0023781 (2003-01-01), Benhase et al.
patent: 2003/0070041 (2003-04-01), Beardsley et al.
patent: 2003/0101369 (2003-05-01), Kahler et al.
patent: 2003/0101371 (2003-05-01), Fairhurst et al.
IBM Corp., “Simultaneous Dual Link Transfer from Single Host to Single Target using Serial Storage Architecture (SSA)”, Research Disclosure No. 436, Article No. 436139, Aug. 2000, p. 1457.
Nielsen Karl Allen
Vageline Michael P.
Konrad Raynes & Victor LLP
Nguyen Hiep T.
Victor David W.
LandOfFree
Method, system, and program for processing input/output... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method, system, and program for processing input/output..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method, system, and program for processing input/output... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3356626