Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2011-07-19
2011-07-19
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C714S025000, C714S048000, C714S705000, C714S712000, C714S799000, C455S522000, C710S267000, C370S242000, C370S349000, C370S244000, C370S225000
Reexamination Certificate
active
07984341
ABSTRACT:
A system for processing errors in a processor comprising, an error counter, a pass counter, and a processing portion operative to determine whether a first error is active, increment an error counter responsive to determining that the first error is active, increment the pass counter responsive to determining that all errors have been checked, and clear the error counter responsive to determining that the pass counter is greater than or equal to a pass count threshold value.
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D. Nemir et al., “Arc Fault Management Using Solid State Switching,” 2004-01-3197, Copyright 2004 SAE International, SAE Transactions Journal of Aerospace, pp. 1932-1942, 2004.
Farrell Mark S.
Meaney Patrick J.
Wisniewski Rebecca S.
Campbell John
Cantor & Colburn LLP
International Business Machines - Corporation
Trimmings John P
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