Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-04-26
2011-04-26
Song, Jasmine (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S137000, C711S146000, C711S147000, C711S204000
Reexamination Certificate
active
07934059
ABSTRACT:
A method of preventing lockout and stalling conditions in a multi-node system having a plurality of nodes which includes initiating a processor request to a shared level of cache in a requesting node, performing a fabric coherency establishment sequence on the plurality of nodes, issuing a speculative memory fetch request to a memory, detecting a conflict on one of the plurality of nodes and communicating the conflict back to the requesting node within the system, canceling the speculative memory fetch request issued, and repeating the fabric coherency establishment sequence in the system until the point of conflict is resolved, without issuing another speculative memory fetch request. The subsequent memory fetch request is only issued after determining the state of line within the system, after the successful completion of the multi-node fabric coherency establishment sequence.
REFERENCES:
patent: 6467032 (2002-10-01), Lippert
patent: 6954829 (2005-10-01), Beers et al.
patent: 2004/0122966 (2004-06-01), Hum et al.
patent: 2005/0275658 (2005-12-01), Sasaki et al.
patent: 2009/0089510 (2009-04-01), Lee et al.
Principles of Operation PA-compressed, split 1.
Principles of Operation PA-compressed, split 2.
Principles of Operation PA-compressed, split 3.
Principles of Operation PA-compressed, split 4.
Blake Michael A.
Mak Pak-kin
O'Neill, Jr. Arthur J.
Papazova Vesselina K.
Waters Craig R.
Campbell John
Cantor & Colburn LLP
International Business Machines - Corporation
Song Jasmine
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