Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-04-19
2011-04-19
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S118000, C711S103000, C711SE12063, C711S128000
Reexamination Certificate
active
07930514
ABSTRACT:
A method, system, and computer program product for implementing a dual-addressable cache is provided. The method includes adding fields for indirect indices to each congruence class provided in a cache directory. The cache directory is indexed by primary addresses. In response to a request for a primary address based upon a known secondary address corresponding to the primary address, the method also includes generating an index for the secondary address, and inserting or updating one of the indirect indices into one of the fields for a congruence class relating to the secondary address. The indirect index is assigned a value of a virtual index corresponding to the primary address. The method further includes searching congruence classes of each of the indirect indices for the secondary address.
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Hagspiel Norbert
Pfeffer Erwin
Wagar Bruce A.
Bragdon Reginald G
Campbell John
Cantor & Colburn LLP
International Business Machines - Corporation
Wang Victor W
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