Method, system, and computer program product for...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S118000, C711S103000, C711SE12063, C711S128000

Reexamination Certificate

active

07930514

ABSTRACT:
A method, system, and computer program product for implementing a dual-addressable cache is provided. The method includes adding fields for indirect indices to each congruence class provided in a cache directory. The cache directory is indexed by primary addresses. In response to a request for a primary address based upon a known secondary address corresponding to the primary address, the method also includes generating an index for the secondary address, and inserting or updating one of the indirect indices into one of the fields for a congruence class relating to the secondary address. The indirect index is assigned a value of a virtual index corresponding to the primary address. The method further includes searching congruence classes of each of the indirect indices for the secondary address.

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patent: 5584002 (1996-12-01), Emma et al.
patent: 5668968 (1997-09-01), Wu
patent: 6772315 (2004-08-01), Perego
patent: 2003/0159003 (2003-08-01), Gaskins et al.
patent: 2005/0055528 (2005-03-01), Arimilli et al.

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