Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-06-20
2006-06-20
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S266000, C710S261000, C370S463000
Reexamination Certificate
active
07065598
ABSTRACT:
Provided are a method, system and article of manufacture for adjusting interrupt levels. A current system interrupt rate at a computational device is determined, wherein the current system interrupt rate is a sum of interrupt rates from a plurality of interrupt generating agents. The current system interrupt rate is compared with at least one threshold interrupt rate associated with the computational device. Based on the comparison, an interrupt moderation level is adjusted at an interrupt generating agent of the plurality of interrupt generating agents.
REFERENCES:
patent: 5414858 (1995-05-01), Hoffman et al.
patent: 6065089 (2000-05-01), Hickerson et al.
patent: 2003/0200368 (2003-10-01), Musumeci
10 Gigabit Ethernet Alliance, “10 Gigabit Ethernet Technology Overview White Paper”, Revision 2, Draft A, Apr. 2002, pp. 1-16.
U.S. Appl. No. 10/313,380, filed Dec. 6, 2002, entitled “Method, System, and Article of Manufacture for Increasing Network Throughput”, invented by P. L. Connor & E. K. Mann.
Chiu Chun Yang
Connor Patrick L.
Durham David M.
Govindarajan Priya
Gumanow Gary D.
Dutta Rabin Dranath
Huynh Kim T.
Intel Corporation
Konrad Raynes & Victor LLP
Perveen Rehana
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