Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-11-16
2008-09-09
Phan, Raymond N (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S057000
Reexamination Certificate
active
07424566
ABSTRACT:
An interconnect apparatus provides for the buffering of information in respective transaction buffers according to transaction type. An additional buffer is dynamically assignable to one of the transaction buffers where additional capacity is required by that transaction buffer.
REFERENCES:
patent: 5802055 (1998-09-01), Krein et al.
patent: 6243781 (2001-06-01), Gandhi et al.
patent: 6820091 (2004-11-01), Weigelt
patent: 6862673 (2005-03-01), Lee et al.
patent: 6931472 (2005-08-01), Kondo et al.
patent: 7191255 (2007-03-01), Wong et al.
patent: 2002/0138790 (2002-09-01), Nishtala
patent: 2004/0019729 (2004-01-01), Kelley et al.
patent: 2005/0125590 (2005-06-01), Li et al.
Bozkaya Ali
Manula Brian Edward
Sandven Magne Vigulf
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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